The invention relates to a semiconductor device comprising a semiconductor body with a layer-shaped region of a first conductivity type which adjoins a surface and is provided with a first junction field effect transistor (JFET) of a type in which the channel can be pinched off in a lateral direction parallel to the surface, which transistor comprises a channel which adjoins the surface and is separated by a pn junction from an adjoining portion of the semiconductor body which forms a gate region of the transistor.
In a junction field effect transistor, referred to as JFET for short hereinafter, current modulation takes place through control of the reverse bias voltage across the pn junction between the gate and the channel, which are of mutually opposing conductivity types. The reverse bias voltage determines the width of the depletion region at the reverse-biased pn junction, and thus the width of the current-passing, not depleted channel. A parameter which is important for various applications is the pinch-off voltage, i.e. the voltage applied to the drain at which the channel at the drain side is depleted over its entire width. Beyond the pinch-off voltage the current through the channel will not or substantially not increase with an increasing voltage between the source and drain, which renders the JFET suitable, for example, as a current source.
In bipolar processes the channel of the JFET is usually formed by an island-shaped portion of an epitaxial layer, for example of the n-type, provided on a substrate of the p-type. The gate comprises a p-type surface zone which is diffused or implanted into the island and which forms the gate electrode, possibly in conjunction with the substrate. The pinch-off voltage is mainly determined, given the doping concentrations of the various zones and regions, by the width of the channel, i.e. by the distance between the substrate and the p-type surface zone. Since this zone is usually formed simultaneously with the base of bipolar transistors, the JFET has a fixed pinch-off voltage at a given thickness of the epitaxial layer, and it is in general not possible to set the pinch-off voltage for a desired value which is different from the said fixed value. Such a limitation in general occurs in vertical configurations in which channel and gate regions lie one above the other.
U.S. Pat. No. 3,450,963 discloses a JFET whose channel is formed by a very narrow island-shaped portion in an epitaxial n-type layer on a p-type substrate. The island, which terminates in two widened portions on either side of the channel forming the source and the drain, is laterally bounded in the epitaxial layer by a deep p-type insulation diffusion which forms the gate electrode of the transistor. The channel is pinched off by depletion regions which extend laterally from the sides of the channel, i.e. in a direction parallel to the surface, into the channel. The pinch-off voltage is determined by the channel width, which in its turn is determined by a dimension on a mask. It is accordingly possible to vary the pinch-off voltage, at least within certain limits, in that this dimension can be adjusted.
A disadvantage of the known transistor is that it is not easy to insulate the gate electrode from the substrate, at least without drastic changes in the process such as the use of double epitaxial layers, which renders the transistor unsuitable for many applications.
When the drain-source voltage increases during operation, the current will again increase strongly owing to avalanche breakdown at the drain-gate electrode junction at a certain voltage beyond the pinch-off voltage. For some applications, for example, in high-voltage ICs which are to be connected to the mains through a rectifier, a high breakdown voltage is required. The use of a voltage divider is not always possible in that case, for example, in those cases in which the device must also be capable of operation at a lower voltage, for example, at a voltage of 12 V supplied by a battery.